Feasibility of an Electro-Optic Link for Bondpad-less CMOS Lab-on-Chips

This paper explores the feasibility of developing CMOS-based lab-on-chips to analyse the properties of a fluid, without the need for bond wires. Both inductive and electro-optical schemes are suggested as possible solutions. Specifically, this paper details a novel approach in achieving electro-optical modulation in unmodified, commercially-available CMOS technology. By exploiting the plasma dispersion effect, it is shown how mid-infrared light can be modulated using parasitic structures designed in a CMOS integrated circuit. Both the fundamental theory and practical realisation are supported with measured data from an experimental setup.Accepted versio

A CMOS-based light modulator for contactless data transfer: theory and concept

Accepted versio

Experimental study of gradual/abrupt dynamics of HfO₂-based 1 memristive devices

The resistance switching dynamics of TiN/HfO2/Pt devices is analyzed in this paper. When biased with a voltage ramp of appropriate polarity, the devices experience SET transitions from high to low resistance states in an abrupt manner, which allows identifying a threshold voltage. However, we find that the stimulation with trains of identical pulses at voltages near the threshold results in a gradual SET transition, whereby the resistive state visits a continuum of intermediate levels as it approaches some low resistance state limit. On the contrary, RESET transitions from low to high resistance states proceed in a gradual way under voltage ramp stimulation, while gradual resistance changes driven by trains of identical spikes cover only a limited resistance window. The results are discussed in terms of the relations among the thermo-electrochemical effects of Joule heating, ion mobility, and resistance change, which provide positive and negative closed loop processes in SET and RESET, respectively. Furthermore, the effect of the competition between opposite tendencies of filament dissolution and formation at opposite metal/HfO2 interfaces is discussed as an additional ingredient affecting the switching dynamics

An improved data-driven memristor model accounting for sequences stimulus features

The natural similarity between the emerging memristive technology and synapses makes memristor a promising device in the spiking input based neuromorphic systems. However, while asynchronous signal processing relies on memristor's response under the pulses stimulus, hardly any memristor models take the impact of sequences features on device behaviour into account. This paper proposes an optimized data-driven compact memristor model where the boundary of its internal state variable-resistive state (RS) is modelled with pulse amplitude and pulse width based on characterisation data. The model has been developed in Verilog-A and verified in Cadence Virtuoso Electronic Design Automation (EDA) tools. Based on the simulation, we further introduce a new concept “Effective Time Window”. Along with the observed pulse width modulated resistance, more potential circuit applications can be implemented based on a more realistic memristor switching behaviour

An FPGA-based system for generalised electron devices testing

Electronic systems are becoming more and more ubiquitous as our world digitises. Simultaneously, even basic components are experiencing a wave of improvements with new transistors, memristors, voltage/current references, data converters, etc, being designed every year by hundreds of R &D groups world-wide. To date, the workhorse for testing all these designs has been a suite of lab instruments including oscilloscopes and signal generators, to mention the most popular. However, as components become more complex and pin numbers soar, the need for more parallel and versatile testing tools also becomes more pressing. In this work, we describe and benchmark an FPGA system developed that addresses this need. This general purpose testing system features a 64-channel source-meter unit, and [Formula: see text] banks of 32 digital pins for digital I/O. We demonstrate that this bench-top system can obtain [Formula: see text] current noise floor, [Formula: see text] pulse delivery at [Formula: see text] and [Formula: see text] maximum current drive/channel. We then showcase the instrument's use in performing a selection of three characteristic measurement tasks: (a) current-voltage characterisation of a diode and a transistor, (b) fully parallel read-out of a memristor crossbar array and (c) an integral non-linearity test on a DAC. This work introduces a down-scaled electronics laboratory packaged in a single instrument which provides a shift towards more affordable, reliable, compact and multi-functional instrumentation for emerging electronic technologies

Role and optimization of the active oxide layer in TiO₂-based RRAM

TiO2 is commonly used as the active switching layer in resistive random access memory. The electrical characteristics of these devices are directly related to the fundamental conditions inside the TiO2 layer and at the interfaces between it and the surrounding electrodes. However, it is complex to disentangle the effects of film “bulk” properties and interface phenomena. The present work uses hard X-ray photoemission spectroscopy (HAXPES) at different excitation energies to distinguish between these regimes. Changes are found to affect the entire thin film, but the most dramatic effects are confined to an interface. These changes are connected to oxygen ions moving and redistributing within the film. Based on the HAXPES results, post-deposition annealing of the TiO2 thin film was investigated as an optimisation pathway in order to reach an ideal compromise between device resistivity and lifetime. The structural and chemical changes upon annealing are investigated using X-ray absorption spectroscopy and are further supported by a range of bulk and surface sensitive characterisation methods. In summary, it is shown that the management of oxygen content and interface quality is intrinsically important to device behavior and that careful annealing procedures are a powerful device optimisation technique

A CMOS-based characterisation platform for emerging RRAM technologies

Mass characterisation of emerging memory devices is an essential step in modelling their behaviour for integration within a standard design flow for existing integrated circuit designers. This work develops a novel characterisation platform for emerging resistive devices with a capacity of up to 1 million devices on-chip. Split into four independent sub-arrays, it contains on-chip column-parallel DACs for fast voltage programming of the DUT. On-chip readout circuits with ADCs are also available for fast read operations covering 5-decades of input current (20nA to 2mA). This allows a device’s resistance range to be between 1kΩ and 10MΩ with a minimum voltage range of ±1.5V on the device